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  • Atmel Atmega8




schematikpinout.jpg


I/O


/* -----------------------------------------------------------------------
 * Title:    Led counting reaction on pressed switch (I/O)
 * Hardware: ATmega8dfgdg
 * Software: WinAVR 20060421
 -----------------------------------------------------------------------*/
 
#define F_CPU 16000000UL          // @Define software reference clock for delay duration
                                  // Must be write before call delay.h
#include <avr/io.h>
#include <util/delay.h>
 
#define SWT PB4             n SWT (PB2) *1
DDRD = 0xFF;                      // Set output direction on PORTB
 
 
for (;;)                          // Endless loop
{
    if (bit_is_clear(PINB, SWT))  // Read SWT pin (if SWT pressed, do the loop one time)
    {
    LED = x;                      // show 8 leds x value
    x++;                          // x + 1
    if ( x > 255 ) x = 0 ;        // when 256 return to 0
    _delay_ms (500);              // blinking delay
    }
}
 
return 0;
}


SPI

Control Register – SPCR

spcr.jpg


  • Bit 7 – SPIE: SPI Interrupt Enable
    This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set and the if
    the global interrupt enable bit in SREG is set.
  • Bit 6 – SPE: SPI Enable
    When the SPE bit is written to one, the SPI is enabled. This bit must be set to enable any SPI
    operations.
  • Bit 5 – DORD: Data Order
    When the DORD bit is written to one, the LSB of the data word is transmitted first.
    When the DORD bit is written to zero, the MSB of the data word is transmitted first.
  • Bit 4 – MSTR: Master/Slave Select This bit selects Master SPI mode when written to one, and Slave SPI mode when written logic
    zero.
  • Bit 3 – CPOL: Clock Polarity:When this bit is written to one, SCK is high when idle. When CPOL is written to zero, SCK is low
    when idle.
  • Bit 2 – CPHA: Clock Phase: The settings of the clock phase bit (CPHA) determine if data is sampled on the leading (first) or
    trailing (last) edge of SCK.
  • Bits 1, 0 – SPR1, SPR0: SPI Clock Rate Select 1 and 0. These two bits control the SCK rate of the device configured as a Master
spsr5.jpg

SPI Data Register - SPDR


spdrreg2.jpg

/* -----------------------------------------------------------------------
 * Title:    Simple Serial communication input (led blinking indication)
 * Hardware: ATmega8
 * Software: WinAVR 20060421
 -----------------------------------------------------------------------*/
#define F_CPU 16000000UL           // Define software reference clock for delay duration
#include <avr/io.h>
#include <util/delay.h>
#include <avr/interrupt.h>
 
#define DD_MOSI     PINB3
#define DD_MISO     PINB4
 
#define DD_SCK      PINB5
#define DDR_SPI     PORTB
 
 
void SPI_SlaveInit(void)
{
 
DDR_SPI = (1<<DD_MISO);
 
SPCR = (1<<SPE)|(1<<CPOL)|(1<<SPIE);      // SPI enable / Clock polarity 1 / SPI interrupts enable
 
}
 
int main(void) {
 
SPI_SlaveInit();
 
DDRD = 0xFF;
sei();
 
for (;;)
{
 
_delay_ms(10);
 
}
return 0;
}
 
ISR (SPI_STC_vect)                         // Interrupt on Int0 vector
 
{
 
 
PORTD = ~(SPDR);
 
 
}


/* -----------------------------------------------------------------------
 * Title:    10byte SPI communication (input and with no protection)
 * Hardware: ATmega8
 * Software: WinAVR 20060421
 -----------------------------------------------------------------------*/
#define F_CPU 16000000UL           // Define software reference clock for delay duration
#include <avr/io.h>
#include <util/delay.h>
#include <avr/interrupt.h>
 
#define DD_MOSI     PINB3          // Master out - Slave in pin
#define DD_MISO     PINB4          // Master in - Slave out pin
 
#define DD_SCK      PINB5          // Clock from master
#define DDR_SPI     PORTB          // DDR_SPI
 
volatile int Data[8];
int x;
 
 
void SPI_SlaveInit(void)
 
{
 
  DDR_SPI = (1<<DD_MISO);          // PORTB = 00001000 // should this not be  MOSI?
  SPCR = (1<<SPE)|(1<<CPOL)|(1<<SPIE); // set SPI enable, spi clock polarity ,  spi interrupts enable
 
}
 
int main(void) {
 
  SPI_SlaveInit();                 // jump to SPI routine initilize
 
  sei();                           // Enable all interrupts
 
  for (;;)                         // Infinit loop whoa!
  {
 
 
  }
 
  return 0;
}
 
ISR (SPI_STC_vect)                  // SPI interrupts
 
{
 
Data[x] = SPDR;                     // receive and store byte
 
x++;                                // shift to next byte array (0 1 2 3 4 5 6 7 8 9 = 10 bytes)
 
if (x == 10) x = 0;                 // When 10 = reset
 
 
 
}
 


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